The present invention generally relates to thermal management of electronic circuit components. More particularly, this invention relates to promoting heat transfer from a surface-mount circuit device to a heat sink through direct attachment of thermal vias to the heat sink.
A variety of approaches are known for dissipating heat generated by semiconductor devices, such as integrated circuit (IC) chips. In the case of high-power IC chips, such as power flip chips, substrates of choice are typically formed of ceramic materials, such as alumina (Al2O3), which have higher thermal conductivities than printed circuit board (PCB) materials.
Laminate-type ceramic substrates known as low temperature co-fired ceramics (LTCC) have a number of process-related advantages over conventional ceramic substrates. LTCC substrates are conventionally made up of multiple green tapes containing a mixture of glass and ceramic fillers in an organic binder. The tapes are collated (stacked), laminated, and then fired (co-fired), during which the organic binders within the laminate stack are burned off and the remaining materials form, according to the combined composition, a monolithic ceramic substrate. Though having the above-noted processing advantages, LTCC substrates have relatively low thermal conductivities, typically about 3 W/mK as compared to about 20 W/mK for alumina. Consequently, LTCC substrates have been formed with green tapes containing a metal powder to promote heat dissipation through the substrate. However, a limitation of this approach is that the resulting metal-containing layers of the LTCC substrate are also electrically conductive to some degree.
In applications where individual layers of an LTCC substrate are to carry conductor patterns, resistors, etc., thick-film pastes for these components are often printed using screen printing techniques on individual tapes prior to collating and laminating the tapes. The tapes, along with their conductive, dielectric, and resistive pastes, are then co-fired, during which the binders of these pastes burn off to yield conductors, dielectrics, and resistors on and within the substrate. Because circuit components and their associated interconnect vias within an LTCC substrate generally necessitate that the ceramic layers they contact are nonconductive, improved thermal conductivity cannot be obtained by the use of metal-containing ceramic layers. A solution to this problem is represented in FIG. 1, and involves forming multiple thermal vias 116 through the thickness of an LTCC substrate 110 to conduct heat in a vertical direction from a die-and-wire type power chip 114. The thermal vias 116 are formed by punching vias in each green tape and then filling the vias prior to printing the conductors, resistors, etc. Interconnect vias 118 required to electrically interconnect components on different layers of the LTCC substrate 110 can be formed and filled at the same time as the thermal vias 116. The tapes are then laminated so that the filled vias are aligned to form through-vias, after which the tapes are fired such that the via fill material is co-fired along with conductor and resistor materials printed on surfaces of individual tapes. The entire LTCC substrate 110 (composed of bonded ceramic layers 112) is then bonded with a nonelectrically-conductive adhesive 120 to a heat sink 122 so that the thermal vias 116 conduct heat from the chip 114 to the heat sink 122.
While able to promote the conduction of heat away from power devices, thermal vias in an LTCC substrate do not provide heat spreading because of their through-thickness orientation. Furthermore, thermal vias may be inadequate to achieve suitable thermal management of certain power devices, particularly devices of the flip-chip type. For example, thermal vias alone can be inadequate because the solder bumps of a flip-chip device provide the primary thermal path from the device, and consequently the number of vias is limited by the number of solder bumps and the configuration of the solder bump pattern. In addition, the use of thermal vias is complicated by the fact that the solder bumps usually require electrical isolation as a result of also providing the electrical connection between the device and the substrate.
In view of the above, further improvements would be desirable for thermal management of power IC's, and particularly flip-chip power IC's, on LTCC substrates.